1. Field of the Invention
This invention relates to the field of ping-pong amplifiers, and particularly to techniques for reducing transient switching errors for such amplifiers.
2. Description of the Related Art
Auto-zeroed ping-pong amplifiers are known to provide low input offset voltages. A schematic diagram of a basic ping-pong amplifier 10 is shown in FIG. 1a. Two amplifiers A1 and A2, each of which has differential inputs and outputs, receive a differential input signal made up of signals INP and INM. Each amplifier also includes a common-mode reference voltage input CMR connected to receive a common-mode reference voltage VCMR, and a common-mode feedback circuit. The common-mode feedback circuit sets the amplifier""s common-mode output voltagexe2x80x94given by the sum of its differential outputs divided by 2xe2x80x94so that each of its outputs is nominally set to VCMR when the differential output voltage is zero. VCMR is typically set to a value between the amplifier""s power rails so that the amplifier may have a high gain.
The ping-pong amplifier also includes an output amplifier A0, which is connectable to the outputs of A1 via a pair of switches S1 and S2, or to the outputs of A2 via a pair of switches S3 and S4. A0 has a compensation capacitor CC connected from its output to its inverting input, and provides the ping-pong amplifier""s single-ended output OUT. A pair of fully differential nulling amplifier""s A3 and A4 are used to auto-zero A1 and A2, respectively; the inputs of A3 and A4 are connected to the outputs of A1 and A2 via pairs of switches S5/S6 and S7/S8, respectively. A pair of memory capacitors C1 and C2 are connected to the inputs of A3, and memory capacitors C3 and C4 are connected to A4""s inputs. A switch S9 is connected between the inputs of A1, and a switch S10 is connected between the inputs of A2. A switch S11 is connected between INM and A1, and a switch S12 is connected between INM and A2.
The switches are controlled with a control circuit (not shown), which operates them in accordance with the timing diagram shown in FIG. 1a. The ping-pong amplifier has a two-phase timing cycle. During the first phase (xcfx861), switches S5, S6 and S9 are closed, such that amplifier A1 is auto-zeroed by the output currents of nulling amplifier A3, with the error signals stored on memory capacitors C1 and C2. Switches S3, S4 and S12 are also closed during xcfx861, allowing the differential input signal to be amplified by A2 followed by A0. The roles are reversed during the second phase (xcfx862): switches S7, S8 and S10 are closed such that A2 is auto-zeroed by A4 (with the error signals stored on memory capacitors C3 and C4), and switches S1, S2 and S11 are closed such that the input signal is amplified by A1 followed by A0.
As noted above, amplifiers A1 and A2 each include common-mode feedback circuits which nominally set their common-mode output voltages to VCMR when their differential output voltages are zero. One weakness in this arrangement is that mismatch in the common-mode feedback circuit can result in common-mode output voltages which differ from VCMR. For example, A1 and A2 may produce common-mode output voltages VCMR1 and VCMR2, respectively, and due to mismatch, VCMRxe2x89xa0VCMR2.
A possible cause for this type of mismatch is illustrated in FIG. 1b, which shows one possible implementation of a fully differential amplifier such as A1 or A2: transistors M1-M4 and current sources I0-I2 form an operational amplifier, and transistors M5-M11 and current source I3 form a common-mode feedback circuit. If the average op amp output is higher than VCMR, more current flows through M10 and M11 into M7, which causes M5 and M6 to pull the output voltages back down. However, any mismatch between transistors M8-M11 can result in the common-mode output voltage differing from VCMR, and hence VCMR1 and VCMR2 voltages which are not equal.
Referring back to FIG. 1a, when VCMR1xe2x89xa0VCMR2, and the timing cycle transitions from xcfx861 to xcfx862, the voltage at the inverting input of A0 changes from approximately VCMR1 to VCMR2, which injects a transient with an amplitude about equal to VCMR1-VCMR2 into compensation capacitor CC. Similarly, a transient with an amplitude about equal to VCMR2-VCMR1 is injected into CC when the timing cycle transitions from xcfx862to xcfx861. As shown in FIG. 1a""s timing diagram, these transients appear in the ping-pong amplifier""s output, which reduces the fidelity of the output signal.
A ping-pong amplifier and method are presented which overcome the problems noted above. Differences between VCMR1 and VCMR2 are reduced, which reduces switching transients that might otherwise appear in the amplifier""s output.
The novel ping-pong amplifier includes an error amplifier, which has one input connected to common-mode reference voltage VCMR, its other input switchably connected to the common-mode output of one of the two differential amplifiers A1 and A2, and an output which is switchably connected to the common-mode reference voltage inputs of A1 and A2. Respective storage devices, preferably memory capacitors, are also connected to the two common-mode reference voltage inputs.
In operation, the error amplifier""s input is periodically connected to the common-mode output of A1, and its output is connected to A1""s common-mode reference (CMR) voltage input. This arrangement forms a closed-loop which forces A1""s common-mode output voltage to be equal to VCMR; the error amplifier""s output voltage is stored on the memory capacitor connected to the A1""s CMR input. Similarly, the error amplifier""s input and output are periodically connected to the A2""s common-mode output and common-mode reference input, respectively, to force A2""s common-mode output voltage to be equal to VCMR, with the error amplifier""s output voltage stored on the memory capacitor connected to the A2""s common-mode reference voltage input.
The voltages stored on the memory capacitors connected to the CMR inputs continuously adjust the common-mode output voltages of A1 and A2 so that VCMR1 and VCMR2 are held equal to VCMR. Keeping VCMR1=VCMR2=VCMR ensures that transients due to mismatch in the common-mode feedback circuits are largely reduced.
The invention is preferably used in an auto-zeroing configuration, which further improves the amplifier""s performance.
Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.